section .data
global __divisor
__divisor:
    dd 0

section .text
global enable_sse
enable_sse:
    mov rax, cr0
    and ax, 0xFFFB		;clear coprocessor emulation CR0.EM
    or ax, 0x2			;set coprocessor monitoring  CR0.MP
    mov cr0, rax
    mov rax, cr4
    or ax, 3 << 9		;set CR4.OSFXSR and CR4.OSXMMEXCPT at the same time
    mov cr4, rax
    ret

global enable_write_protect
enable_write_protect:
    mov rax, cr0
    or eax, 0x80000 ;set write-protect CR0.WP
    mov cr0, rax
    ret

global enable_nx
enable_nx:
    mov rcx, 0xC0000080 ; IA32_EFER
    rdmsr
    or eax, 1 << 11 ; no-execute enable (NXE)
    wrmsr
    ret

global load_gdt
load_gdt:
    cli
    lgdt [rdi]
    mov   ax, 0x10
    mov   ds, ax
    mov   es, ax
    mov   fs, ax
    mov   gs, ax
    mov   ss, ax
    push 0x08                 
    lea rax, [rel .reload_CS]
    push rax
    retfq
.reload_CS:
    ret

global load_tr
load_tr:
    mov rax, rdi
    ltr ax
    ret

%macro ISR 1
    global _isr%1
    _isr%1:
        push byte 0
        push byte %1
        jmp _asm_interrupt_entry
%endmacro

%macro ISR_ERROR 1
    global _isr%1
    _isr%1:
        push byte %1
        jmp _asm_interrupt_entry
%endmacro

%macro IRQ 2
    global _isr%1
    _isr%1:
        push byte %2
        push byte %1
        jmp _asm_interrupt_entry
%endmacro

extern arch_interrupt_entry

_asm_interrupt_entry:
    push rax
    push rbx
    push rcx
    push rdx
    push rsi
    push rdi
    push rbp
    push r8
    push r9
    push r10
    push r11
    push r12
    push r13
    push r14
    push r15

    cld

    mov rdi, rsp
    call arch_interrupt_entry

    pop r15
    pop r14
    pop r13
    pop r12
    pop r11
    pop r10
    pop r9
    pop r8
    pop rbp
    pop rdi
    pop rsi
    pop rdx
    pop rcx
    pop rbx
    pop rax

    add rsp, 16

    iretq

ISR 0 ; divide by zero