#include "arch/CPU.h" #include #include #include extern "C" void enable_sse(); extern "C" void enable_write_protect(); namespace CPU { Result identify() { static char brand_string[49]; u32 buf[4]; if (!__get_cpuid(0x80000002, &buf[0], &buf[1], &buf[2], &buf[3])) return err; memcpy(brand_string, buf, 16); if (!__get_cpuid(0x80000003, &buf[0], &buf[1], &buf[2], &buf[3])) return err; memcpy(&brand_string[16], buf, 16); if (!__get_cpuid(0x80000004, &buf[0], &buf[1], &buf[2], &buf[3])) return err; memcpy(&brand_string[32], buf, 16); brand_string[48] = 0; // null-terminate it :) return brand_string; } void platform_init() { enable_sse(); enable_write_protect(); } [[noreturn]] void efficient_halt() // Halt the CPU, using the lowest power possible. On x86-64 we do this using the // "hlt" instruction, which puts the CPU into a low-power idle state until the // next interrupt arrives... and we disable interrupts beforehand. { asm volatile("cli"); // Disable interrupts loop: asm volatile("hlt"); // Let the cpu rest and pause until the next interrupt arrives... which in this case should // be never (unless an NMI arrives) :) goto loop; // Safeguard: if we ever wake up, start our low-power rest again } }