52cb29dbca
core: Add documentation to all scheduler functions + global thread list
2025-02-21 19:37:13 +01:00
8156ff57fe
core: Check the stack is in user memory before changing it to kernel space
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Otherwise, we're just adding the physical base to an address that's already in the higher half.
2025-02-21 18:47:24 +01:00
14047e0c3c
core: Change naming for virtual memory structures to reflect x86_64 terms
2025-02-21 18:33:36 +01:00
930f69c498
core: Don't set the second thread argument to zero
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This defeated the point of passing the page tables to init, since rsi would be set to zero anyway.
2025-02-20 23:01:28 +01:00
34255d6c68
core: Give init a pointer to its own page tables
2025-02-20 17:57:50 +01:00
e9b2f5968a
core/x86_64: Fix function naming style
2025-02-20 17:55:56 +01:00
b87150a35f
core: Add sleep support to the scheduler
2025-02-18 20:06:40 +01:00
9cbb043238
core/x86_64: Make in/out wrappers inline
2025-02-17 23:04:58 +01:00
9c92b3de4b
core: Add priority-based scheduling
2025-02-17 20:15:30 +01:00
6be2261519
core: Store the physical page directory alongside the virtual pointer to it
2025-02-16 13:20:02 +01:00
671a9b5887
core: Add PIT timer code to preempt the scheduler
2025-02-16 11:58:01 +01:00
a209ba7b99
core: Allocate a stack for each core's idle thread
2025-02-16 11:57:27 +01:00
ed324fcf9e
core: Add basic threading code
2025-02-15 22:45:32 +01:00
fa04363a51
core/x86_64: Set up a second stack in the TSS to handle system calls
2025-02-15 22:40:48 +01:00
56f2c018a7
core: Fix a couple of bugs in VMM and add a few utility functions
2025-02-15 22:23:00 +01:00
f93158645b
core/x86_64: Enable the NX bit before using it
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Spent an embarrassing amount of time trying to figure out why there was a page fault with "reserved bits set". Turns out, I had set the NX bit without enabling it.
2025-02-15 22:22:04 +01:00
36b9832053
core/x86_64: Add general protection fault handler
2025-02-15 22:19:08 +01:00
adffd408bc
core: Add a page fault handler
2025-02-15 15:18:40 +01:00
8d70a0f0a1
core: Enable interrupts in platformEndInit()
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This way, each architecture can re-enable interrupts whenever necessary
2025-02-15 15:18:24 +01:00
13ec4bee87
Ready. Set. Go!
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Microkernel development in Zig, should be fun! =]
2025-02-13 22:39:48 +01:00