8 Commits

Author SHA1 Message Date
985d8fec0a
core: Add basic threading code 2025-02-15 22:45:32 +01:00
14578a0fee
core/x86_64: Set up a second stack in the TSS to handle system calls 2025-02-15 22:40:48 +01:00
654b228f10
core: Fix a couple of bugs in VMM and add a few utility functions 2025-02-15 22:23:00 +01:00
ffa9b78bf7
core/x86_64: Enable the NX bit before using it
Spent an embarrassing amount of time trying to figure out why there was a page fault with "reserved bits set". Turns out, I had set the NX bit without enabling it.
2025-02-15 22:22:04 +01:00
da5335410d
core/x86_64: Add general protection fault handler 2025-02-15 22:19:08 +01:00
d8236bc8f7
core: Add a page fault handler 2025-02-15 15:18:40 +01:00
18ec598394
core: Enable interrupts in platformEndInit()
This way, each architecture can re-enable interrupts whenever necessary
2025-02-15 15:18:24 +01:00
fce8a58cf6
Ready. Set. Go!
Microkernel development in Zig, should be fun! =]
2025-02-13 22:39:48 +01:00